Integrated circuits are made in a bulk parallel process by patterning and processing semiconductor wafers. Each wafer contains many identical copies of the same integrated circuit referred to as a “die.” It may be preferable to test the semiconductor wafers before the die is cut into individual integrated circuits and packaged for sale. If defects are detected the defective die can be culled before wasting resources packaging a defective part. The individual die can also be tested after they have been cut into individual integrated circuits and packaged.
To test a wafer or an individual die—commonly called the device under test or DUT—a probe card is commonly used which comes into contact with the surface of the DUT. The probe card generally contains three unique characteristics: (1) an XY array of individual probes that move in the Z direction to allow contact with the die pad; (2) an electrical interface to connect the card to a circuit test apparatus; and (3) a rigid reference plane defined in such a way that the probe card can be accurately mounted in the proper location. When the probe card is brought in contact with the die pad, the Z-direction movement allows for a solid contact with the probe tip. The probe card ultimately provides an electrical interface that allows a circuit test apparatus to be temporarily connected to the DUT. This method of die testing is extremely efficient because many die can be tested at the same time. To drive this efficiency even higher, probe card manufactures are making larger probe cards with an ever-increasing numbers of probes.
The advent of three-dimensional interconnect and chip-stack packaging enabled by thru-silicon via (TSV) interconnection technology presents further challenges to the construction of probe cards. Devices for testing wafers that utilize TSV interconnections will need to be capable of connecting to fine-pitch grid arrays of solder bumps separated in the XY direction by as little as 50 μm (50 μm “pitch”), resulting in thousands of solder bumps being contacted simultaneously. Making electrical connections with the solder bumps, which may have, for instance, diameters of 25 μm, will require that the probes contact the bumps with sufficient force and scrubbing action to penetrate beyond the surface oxides for good contact. However, total probe forces must be minimized to avoid damage or fracture of the silicon wafers, because the wafers are weakened due to being thinned to approximately 50 μm to facilitate the thru-silicon vias.
Conventional probe systems are not well suited to testing these fragile, fine-pitch grid arrays. For example, conventional Vertical MEMS probes for conventional non-TSV semiconductor wafers suffer from a number of shortcomings when applied to weaker, fine-pitch TSV semiconductor wafers. First, such probes are typically fabricated separately and then individually assembled onto a ceramic guide plate, resulting in manufacturing variations in the planarity and positioning of the contact tips of the probes that are unacceptable in fine-pitch applications. Secondly, due to their metal alloy construction, such probes can only be deflected or deformed through a distance that is a small percentage of their size. Thus, when such probes are miniaturized for a fine-pitch application, the amount of available deflection or compliance for testing becomes too small. Likewise, the metal alloy construction of such probes requires a relatively large force to deflect each probe. When the number of such probes are multiplied to provide the density of contacts required in a fine-pitch application, the total deflection forces become quite large, which is contraindicated for thin TSV semiconductor wafers. Third, as a result of their imprecise positioning, the tips of such probes may slide off the hemispherical contact surface of a solder ball and provide a false reading and/or collide with a neighboring probe.
Similarly, conventional MEMS-based micro spring probes, including cantilever and torsion probes, are limited by their relatively large dimensions, which are required to achieve sufficient deflection or compliance with a metallic structure. Such probes also create excessive total force when applied to high-density, fine-pitch applications. Accordingly, such probes are ill-suited for the vast grid arrays used in fine-pitch TSV semiconductor wafers.
Likewise, conventional Membrane probes suffer from a number of shortcomings when applied to fine-pitch TSV semiconductor wafers. Deflection of one portion of the membrane causes lesser deflections of adjacent portions of the membrane. While this may be acceptable in some conventional applications, the high probe density required in fine-pitch applications results in unacceptable cross-deflections among adjacent Membrane probes, or mechanical “cross-talk,” causing the probes to tend to move in unison instead of independently. Fine-pitch Membrane probes also tend to create high total forces on the wafers.
What is needed, therefore, are contact probes that can be readily used with fine pitch microelectronic arrays, for instance by providing sufficient compliance in a small package, while minimizing deflection forces, and while precisely maintaining the planarity and positioning of the contact tips across vast grid arrays.